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Quad, IEEE 802.3at/af PSE Controller
for Power-over-Ethernet
Operation with Multiple Masters
When the device operates on a 3-wire interface with mul-
tiple masters, a master reading the device should use
repeated starts between the write that sets the device’s
address pointer, and the read(s) that take the data from
the location(s). It is possible for master 2 to take over
the bus after master 1 has set up the device’s address
pointer but before master 1 has read the data. If master
2 subsequently resets the device’s address pointer, then
master 1’s read may be from an unexpected location.
Table 4. Autoincrement Rules
Command Address Autoincrementing
Address autoincrementing allows the device to be con-
figured with fewer transmissions by minimizing the num-
ber of times the command address needs to be sent.
The command address stored in the device generally
increments after each data byte is written or read (Table
4). The device is designed to prevent overwrites on
unavailable register addresses and unintentional wrap-
around of addresses.
COMMAND BYTE ADDRESS RANGE
0x00 to 0x71
0x71
AUTOINCREMENT BEHAVIOR
Command address autoincrements after byte read or written
Command address remains at 0x71 after byte written or read
Table 5. Register Map Summary
ADDR
REGISTER
NAME
TYPE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RESET
STATE
INTERRUPTS
00h
Interrupt
R
SUP_INT
TST_INT
TCUT_INT
CLS_INT
DET_INT
DIS_INT
PG_INT
PE_INT
1000–0000
01h
Interrupt Mask
R/W
SUP_MASK
TST_MASK TCUT_MASK CLS_MASK
DET_MASK
DIS_MASK
PG_MASK
PE_MASK
1XX0–0X00
EVENTS
02h
Power Event
R
03h
Power Event
CoR
CoR
PG_CHG4
PG_CHG3
PG_CHG2
PG_CHG1
PE_CHG4
PE_CHG3
PE_CHG2
PE_CHG1
0000–0000
04h
Detect Event
R
05h
Detect Event
CoR
CoR
CLS4
CLS3
CLS2
CLS1
DET4
DET3
DET2
DET1
0000–0000
06h
07h
Fault Event R
Fault Event CoR CoR
DIS4
DIS3
DIS2
DIS1
TCUT4
TCUT3
TCUT2
TCUT1
0000–0000
08h
Startup Event
R
09h
Startup Event
CoR
CoR
ICV4
ICV3
ICV2
ICV1
TSTART4
TSTART3
TSTART2
TSTART1
0000–0000
0Ah
Supply Event
R
0Bh
Supply Event
CoR
CoR
TSD
FETBAD
V DD_UVLO
V EE_UVLO
—
—
—
—
0000–0010
26
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